Altera Arria® V GZ Low Profile PCIe Board with Dual QSFP+ and DDR3, QDRII+, or RLDRAM3

BittWare’s A5-PCIe-L (A5PL) is a low-profile PCIe x8 card based on the Altera Arria V GZ FPGA. 

The high-performance, power- and cost-efficient Arria V GZ provides a high level of system integration and flexibility for I/O, routing, and processing. Up to 8 GBytes of on-board memory includes DDR3, QDRII/II+, or RLDRAM3. Two front-panel QSFP+ cages allow two 40GigE or eight 10GigE interfaces. The A5PL also features a Board Management Controller (BMC) for advanced system monitoring, which greatly simplifies platform management. All of these features combine to make the A5PL a versatile and efficient solution for network processing, security, broadcast, and signals intelligence applications.

Altera Arria V GZ FPGA

The 28nm Arria V family of FPGAs deliver optimal performance, power, and cost efficiency for mid-range applications. The Arria V GZ variant, which is featured on the A5PL, offers the highest bandwidth of the Arria V FPGAs. The Arria V GZ provides Gen3 PCIe x8 via a hard IP block and features 16 full-duplex transceivers with data rates up to 12.5 Gbps, and up to 450K equivalent LEs.

I/O Interfaces

The A5PL provides a variety of interfaces for high-speed serial I/O as well as debug support. Two QSFP+ cages are available on the front panel, each supporting 40GigE or four 10GigE channels using optical transceivers as well as passive copper cabling up to 8 meters. The QSFP+ cages can optionally be adapted for SFP+.

The Gen3 x8 PCIe interface provides 8 SerDes lanes to the Arria V GZ FPGA. A USB 2.0 interface and an optional JTAG connector are available for debug and programming support.

Timestamping and Synchronization

The board supports timestamping and synchronization with optional SMA connectors on the front panel for a 1 PPS and reference clock input.* A tunable, high accuracy, temperature compensated oscillator (TCXO) and a programmable clock synthesizer (Si5338) provide sophisticated timing and clocking options. IP is also available for IEEE 1588 Precision Time Protocol (PTP).

Memory

The A5PL features an extremely flexible memory configuration, with a SODIMM site that supports DDR3 SDRAM, RLDRAM3, and QDRII+. Memory card options include the following: up to 8 GBytes of DDR3 with optional error-correcting codes (ECC); up to 72 MBytes QDRII+ (2 banks x18); or up to 512 MBytes RLDRAM3 (2 banks x18). Additional on-board memory includes flash memory for storing multiple FPGA images. An on-board PROM provides access to the board’s MAC ID.

Board Management Controller

Boards in BittWare’s A5 family feature an advanced system monitoring subsystem, similar to those typically found on today’s server platforms. At the heart of the board’s monitoring system lies a Board Management Controller (BMC), which accepts Intelligent Platform Management Interface (IPMI) messaging protocol commands. The BMC provides a wealth of features, including control of power and resets, monitoring of board sensors, FPGA boot loader, voltage overrides, configuration of programmable clocks, access to I2C bus components, field upgrades, and IPMI messaging. Access to the BMC is via PCIe or USB. BittWare’s BittWorks II Toolkit also provides utilities and libraries for communicating with the BMC components at a higher, more abstract level, allowing developers to remotely monitor the health of the board.

BwMonitor in the BittWorks II Toolkit provides a view into the baseboard management capabilities of your BittWare hardware.

Development Tools

BittWorks II Toolkit

BittWare offers complete software support for the A5PL with its BittWorks II software tools. Designed to make developing and debugging applications for BittWare’s boards easy and efficient, the Toolkit is a collection of libraries and applications that provides the glue between the host application and the hardware. A variety of features allow developers to take full advantage of the Arria V GZ FPGA capabilities on the BittWare board, including FPGA control via PCIe, Flash programming, custom ISR scripts, and convenient control of FPGA loads. The Toolkit supports 32-bit, and 64-bit Windows and Linux platforms and can connect to the board via PCIe or USB, providing a common API no matter the connection method.

FPGA Development Kit

BittWare’s FPGA Development Kit (FDK) provides FPGA board support IP and integration for BittWare’s Altera FPGA-based boards. The FDK includes FPGA components that provide preconfigured physical interfaces, infrastructure, and examples, drastically cutting development time and easily integrating into existing FPGA development environments.

Working example projects are available for each board which illustrate how to move data between the board’s different interfaces. Supported interfaces include DDR3, DDR2, QDR2/+, PCIe, 10GigE, LVDS, SerDes, and Double Data Rate I/O. All example projects are available on BittWare’s Developer Site.

Firmware

Board Specifications
FPGA
Altera® Arria® V GZ FPGA
Up to 16 full-duplex, high-performance, multi-gigabit SerDes transceivers @ up to 12.5 GHz
Up to 450K logic elements available
Up to 34 Mb of embedded memory
1.6 Gbps LVDS performance
Up to 2278 18×18 multipliers
On-Board Memory
Flash memory for booting FPGA
Optional SODIMM
DDR3: x72 w/ECC
Up to 8 GB
RLDRAM3: 2x banks of x18
2x (32 M x 18): 128 MB
2x (64 M x 18): 256 MB
2x (128 M x 18): 512 MB
QDRII+: 2x banks of x18
2x (8 M x 18): 36 MB
PCIe Interface
x8 Gen1, Gen2, Gen3 direct to FPGA
USB Header
USB 2.0 interface for debug and programming FPGA and Flash
Timestamp and Synchronization (Optional)
Tunable high-accuracy TCXO
Programmable clock synthesizer (Si5338)
2 front panel SMA connectors*
1 PPS input
Reference clock input
QSFP+ Cages
2 QSFP+ cages on front panel connected to FPGA via 8 SerDes
Each supports 40GigE or 4 10GigE
Can be optionally adapted for use as SFP+
Baseboard Management Controller
Voltage, current, temperature monitoring
Power sequencing and reset
Field upgrades
FPGA configuration and control
Clock configuration
I2C bus access
USB 2.0 access
Voltage overrides
Size
Half-height, half-length (low profile) PCIe slot card
Development Tools
System Development
BittWorks II Toolkit – host, command, and debug tools for BittWare hardware; source code porting kit also available
FPGA Development
FPGA Development Kit
Physical interface components
Board, I/O, and timing constraints
Example Quartus projects
Software components and drivers
Altera Tools
Quartus II software

Datasheet