The LSF family are bidirectional voltage level translators operational from 0.95 to 4.5 V (Vref_A) and 1.8 to 5.5 V (Vref_B). This allows bidirectional voltage translations between 1 and 5 V without the need for a direction pin in open-drain or push-pull applications.
LSF family supports level translation applications with transmission speeds greater than 100 Mbps for open-drain systems using a 30-pF capacitance and 250-Ω pullup resistor.
When the An or Bn port is LOW, the switch is in the ON-state and a low resistance connection exists between the An and Bn ports. The low Ron of the switch allows connections to be made with minimal propagation delay and signal distortion. Assuming the higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is limited to the voltage set by Vref_A. When the An port is HIGH, the Bn port is pulled to the drain pullup supply voltage (Vpu#) by the pullup resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control.
The supply voltage (Vpu#) for each channel can be individually set up with a pullup resistor. For example, CH1 can be used in up-translation mode (1.2 V ↔ 3.3 V) and CH2 in down-translation mode (2.5 V ↔ 1.8 V).
When EN is HIGH, the translator switch is on, and the An I/O is connected to the Bn I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports. The EN input circuit is designed to be supplied by Vref_B. To ensure the high-impedance state during power-up or power-down, EN must be LOW.
Features
- Provides Bidirectional Voltage Translation With No Direction Pin
- Less Than 1.5 ns Max Propagation Delay
- Supports High Speed Translation, Greater Than 100 MHz
- Supports Hot Insertion
- Allow Bidirectional Voltage Level Translation Between
- 0.95 V ↔ 1.8/2.5/3.3/5 V
- 1.2 V ↔ 1.8/2.5/3.3/5 V
- 1.8 V ↔ 2.5/3.3/5 V
- 2.5 V ↔ 3.3/5 V
- 3.3 V ↔ 5 V
- Low Standby Current
- 5 V Tolerance I/O Port to Support TTL
- Low Ron Provides Less Signal Distortion
- High-Impedance I/O pins For EN = Low
- Flow-Through Pinout for Ease PCB Trace Routing
- Latch-Up Performance Exceeds 100 mA Per JESD 17
- –40°C to 125°C Operating Temperature Range
- ESD Performance Tested Per JESD 22
- 2000 V Human-Body Model (A114-B, Class II)
- 200 V Machine Model (A115-A)
- 1000 V Charged-Device Model (C101)
Fonte - Texas Instruments Inc
