This series of general purpose, 28/44-pin, 16-bit flash microcontrollers are very well-suited for data protection and in battery-powered devices due to their low power technology.
These microcontrollers benefit greatly from Microchip’s eXtreme Low Power XLP technology. Current consumption for deep sleep modes are as follows:
- WDT: 270nA @ 3.3V typical
- RTCC: 400nA @ 32 kHz, 3.3V typical
- Deep Sleep Current, 40 nA, 3.3V typical
The integrated cryptographic engine supports AES, DES, and 3DES encryption. For more information on how the PIC24F “GB2” microcontrollers can be used for secure data transfers and storage for Internet of Things and other various battery-powered embedded applications.
Cryptographic Engine
• AES Engine with 128,192 or 256-Bit Key • Supports ECB, CBC, OFB, CTR and CFB128 modes • DES/Triple DES (TDES) Engine: Supports 2-Key and 3-Key EDE or DED TDES • Supports up to Three Unique Keys for TDES • Programmatically Secure • True Random Number Generator • Pseudorandom Number Generator • Non-Readable, On-Chip, OTP Key Storages
Universal Serial Bus Features
• USB v2.0 On-The-Go (OTG) Compliant • Dual Role Capable; can Act as Either Host or Peripheral • Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) USB Operation in Host mode • Full-Speed USB Operation in Device mode • High-Precision PLL for USB • USB Device mode Operation from FRC Oscillator: - No crystal oscillator required • Supports up to 32 Endpoints (16 bidirectional): - USB module can use any RAM locations on the device as USB endpoint buffers • On-Chip USB Transceiver • Supports Control, Interrupt, Isochronous and Bulk Transfers • On-Chip Pull-up and Pull-Down Resistors
Extreme Low-Power Features
• Multiple Power Management Options for Extreme Power Reduction: - VBAT allows the device to transition to a backup battery for the lowest power consumption with RTCC - Deep Sleep allows near total power-down, with the ability to wake-up on internal or external triggers - Sleep and Idle modes selectively shut down peripherals and/or core for substantial power reduction and fast wake-up - Doze mode allows CPU to run at a lower clock speed than peripherals
• Alternate Clock modes allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction • Extreme Low-Power Current Consumption for Deep Sleep: - WDT: 270 nA @ 3.3V typical - RTCC: 400 nA @ 32 kHz, 3.3V typical - Deep Sleep current, 40 nA, 3.3V typical
Analog Features
• 10/12-Bit, 12-Channel Analog-to-Digital (A/D) Converter: - Conversion rate of 500 ksps (10-bit), 200 ksps (12-bit) - Conversion available during Sleep and Idle • Three Rail-to-Rail, Enhanced Analog Comparators with Programmable Input/Output Configuration • Three On-Chip Programmable Voltage References • Charge Time Measurement Unit (CTMU): - Used for capacitive touch sensing, up to 12 channels - Time measurement down to 100 ps resolution - Operation in Sleep mode
High-Performance CPU
• Modified Harvard Architecture • Up to 16 MIPS Operation @ 32 MHz • 8 MHz Internal Oscillator: - 96 MHz PLL option - Multiple clock divide options - Run-time self-calibration capability for maintaining better than ±0.20% accuracy - Fast start-up • 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier • 32-Bit by 16-Bit Hardware Divider • 16 x 16-Bit Working Register Array • C Compiler Optimized Instruction Set Architecture (ISA) • Two Address Generation Units (AGUs) for Separate Read and Write Addressing of Data Memory
Special Microcontroller Features
• Supply Voltage Range of 2.0V to 3.6V • Two On-Chip Voltage Regulators (1.8V and 1.2V) for Regular and Extreme Low-Power Operation • 20,000 Erase/Write Cycle Endurance Flash Program Memory, Typical • Flash Data Retention: 20 Years Minimum • Self-Programmable under Software Control • Programmable Reference Clock Output • In-Circuit Serial Programming™ (ICSP™) and In-Circuit Emulation (ICE) via 2 Pins • JTAG Programming and Boundary Scan Support • Fail-Safe Clock Monitor (FSCM) Operation: - Detects clock failure and switches to on-chip, Low-Power RC Oscillator • Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Separate Brown-out Reset (BOR) and Deep Sleep Brown-out Reset (DSBOR) Circuits • Programmable High/Low-Voltage Detect (HLVD) • Flexible Watchdog Timer (WDT) with its Own RC Oscillator for Reliable Operation • Standard and Ultra Low-Power Watchdog Timers (ULPW) for Reliable Operation in Standard and Deep Sleep modes
